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<head><meta charset="utf-8"><title>Add #[cfg(codegen_backend)] · t-compiler · Zulip Chat Archive</title></head>
<h2>Stream: <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/index.html">t-compiler</a></h2>
<h3>Topic: <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html">Add #[cfg(codegen_backend)]</a></h3>

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<a name="201479453"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201479453" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> bjorn3 <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201479453">(Jun 20 2020 at 14:20)</a>:</h4>
<p>I have been thinking about adding a <code>#[cfg(codegen_backend)]</code> cfg for conditional codegen based on the codegen backend used. This would for example allow me to upstream the last remaining patch to the standard library that cg_clif needs. Does this sound like a good idea?</p>
<p><em>For those who are curious: The patch is to return false from <code>has_cpuid</code>. This is necessary because Cranelift doesn't have a <code>cpuid</code> instruction. Returning false also disables detection of most target features, which results in not requiring implementation of the associated intrinsics in cg_clif.</em></p>



<a name="201479653"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201479653" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> simulacrum <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201479653">(Jun 20 2020 at 14:26)</a>:</h4>
<p>I would personally be okay with this as a permanently unstable thing - I think we should work really hard that end user code doesn't need to do this. I also don't really understand what you mean by cranelift not having a cpuid instruction - I thought cranelift didn't look at inline assembly?</p>



<a name="201479958"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201479958" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> bjorn3 <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201479958">(Jun 20 2020 at 14:37)</a>:</h4>
<blockquote>
<p>I would personally be okay with this as a permanently unstable thing</p>
</blockquote>
<p>Ok</p>
<blockquote>
<p>I think we should work really hard that end user code doesn't need to do this.</p>
</blockquote>
<p>I completely agree. There used to be many patches to the standard library for unimplemented things that I didn't want to upstream. Now it is just a single thing related to SIMD, which is hard to implement due to the sheer amount of intrinsics anyway.</p>
<blockquote>
<p>I thought cranelift didn't look at inline assembly?</p>
</blockquote>
<p>Indeed. cg_clif does however check for certain known <code>asm!()</code> blocks and generates something sensible when possible or emits a trap when not possible. For example a black box gets codegened to nothing. And so does the <code>__rust_probestack</code> implementation in compiler-builtins. (I disabled probestack in Cranelift) If Cranelift had a <code>cpuid</code> instruction, I could use it to codegen the <code>cpuid</code> asm block. I currently have to codegen a trap instead.</p>



<a name="201482228"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482228" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> simulacrum <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482228">(Jun 20 2020 at 15:27)</a>:</h4>
<blockquote>
<p>Indeed. cg_clif does however check for certain known asm!() blocks and generates something sensible when possible or emits a trap when not possible. For example a black box gets codegened to nothing. And so does the __rust_probestack implementation in compiler-builtins. (I disabled probestack in Cranelift) If Cranelift had a cpuid instruction, I could use it to codegen the cpuid asm block. I currently have to codegen a trap instead.</p>
</blockquote>
<p>I'm really confused by this to be honest, if you already have special logic like this can't you utilize it to fill in the cpuid mask with say zeroes or whatever?</p>



<a name="201482231"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482231" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> simulacrum <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482231">(Jun 20 2020 at 15:27)</a>:</h4>
<p>(i.e. implement cpuid returning default values)</p>



<a name="201482357"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482357" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> bjorn3 <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482357">(Jun 20 2020 at 15:30)</a>:</h4>
<p>I don't know what the default value is for which cpuid call.</p>



<a name="201482464"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482464" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> simulacrum <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482464">(Jun 20 2020 at 15:33)</a>:</h4>
<p>I guess one option is to make target_cpuid the flag rather than making it codegen-backend specific, which seems maybe somewhat more reasonable</p>



<a name="201482655"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482655" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Josh Triplett <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482655">(Jun 20 2020 at 15:38)</a>:</h4>
<p>I'm assuming that adding a cpuid intrinsic would be relatively straightforward, and you're just concerned about all the other intrinsics that would be expected to work based on what cpuid returns?</p>



<a name="201482672"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482672" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Josh Triplett <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482672">(Jun 20 2020 at 15:39)</a>:</h4>
<p>It should be straightforward to auto-generate a pile of intrinsic functions for individual instructions by using the XML descriptions of the intrinsics.</p>



<a name="201482678"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482678" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Josh Triplett <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482678">(Jun 20 2020 at 15:39)</a>:</h4>
<p>If you had all of those intrinsics generated, would there be any other reason to not have cpuid?</p>



<a name="201482905"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201482905" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Josh Triplett <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201482905">(Jun 20 2020 at 15:44)</a>:</h4>
<p>I might be able to get someone to implement that code generator to build all the intrinsics, if that will help.</p>



<a name="201484426"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201484426" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> bjorn3 <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201484426">(Jun 20 2020 at 16:13)</a>:</h4>
<p><span class="user-mention silent" data-user-id="239881">Josh Triplett</span> <a href="#narrow/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D/near/201482678">said</a>:</p>
<blockquote>
<p>If you had all of those intrinsics generated, would there be any other reason to not have cpuid?</p>
</blockquote>
<p>When all those intrinsics have codegen, there is no reason to not have <code>cpuid</code>.</p>
<p><span class="user-mention silent" data-user-id="239881">Josh Triplett</span> <a href="#narrow/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D/near/201482672">said</a>:</p>
<blockquote>
<p>It should be straightforward to auto-generate a pile of intrinsic functions for individual instructions by using the XML descriptions of the intrinsics.</p>
</blockquote>
<p>The intrinsics I need to implement are the LLVM intrinsics (eg for SSE2: <a href="https://github.com/rust-lang/stdarch/blob/b17efd88af158b14b32ff394efb57c1b90179bf5/crates/core_arch/src/x86/sse2.rs#L3016-L3167">https://github.com/rust-lang/stdarch/blob/b17efd88af158b14b32ff394efb57c1b90179bf5/crates/core_arch/src/x86/sse2.rs#L3016-L3167</a>) used to implement the SIMD intrinsics in <code>core::arch</code>. For the different vector/lane sizes the names of those intrinsics are relatively similar for similar operations. This means that it is easy to implement intrinsics that work for any vector/lane size. The problem is more that there are a lot of different operations, which each have to get their own codegen. There are also intrinsics like <code>lvm.x86.pause</code> or <code>llvm.x86.xsave</code> that don't have equivalent Cranelift instructions.</p>



<a name="201484821"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201484821" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> bjorn3 <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201484821">(Jun 20 2020 at 16:21)</a>:</h4>
<p>I almost forgot the biggest problem: The <code>simd_extract</code> <code>platform-intrinsic</code> requires a constant as last argument. However <code>_mm_extract_epi16</code> is a wrapper around it, which doesn't pass a constant argument. Instead it requires its last argument to be constant itself and uses <code>#[inline]</code>. This works fine for LLVM, as the argument is a constant after optimizations. For Cranelift however there is no inlining support and Cranelift requires it to already be constant when generating the clif ir, not just after optimizations. The <code>extractlane</code> clif instruction takes a <code>u8</code> as argument, not a <code>Value</code> for the lane selection. <a href="https://github.com/bjorn3/rustc_codegen_cranelift/issues/666">https://github.com/bjorn3/rustc_codegen_cranelift/issues/666</a></p>



<a name="201484825"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201484825" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> bjorn3 <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201484825">(Jun 20 2020 at 16:21)</a>:</h4>
<p><span class="user-mention" data-user-id="239881">@Josh Triplett</span> ^</p>



<a name="201510819"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/131828-t-compiler/topic/Add%20%23%5Bcfg%28codegen_backend%29%5D/near/201510819" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> nagisa <a href="https://rust-lang.github.io/zulip_archive/stream/131828-t-compiler/topic/Add.20.23.5Bcfg(codegen_backend).5D.html#201510819">(Jun 21 2020 at 02:09)</a>:</h4>
<p>I find idea of code <code>cfg</code>ing based on one of the many backends scary, but I wouldn’t might so much if it was for now perma-unstable std-only thing.</p>



<hr><p>Last updated: Aug 07 2021 at 22:04 UTC</p>
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